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serial presence detect pc133 sodimm rev. 1.2 march. 2000 rev. 1.2 pc133 unbuffered sdram sodimm(144pin) spd specification march. 2000
serial presence detect pc133 sodimm rev. 1.2 march. 2000 ? revision history [revision 0.0] oct. 11, 1999 jedec based pc133 sodimm spd published. [revision 0.1] dec. 27, 1999 add 64mb d-die based module spd. [revision 1.0] jan. 24, 2000 change spd reference to intel 1.2b version. changed spd revision code(byte62) from 02h based to 12h. [revision 1.1] feb. 10, 2000 typo correction. [revision 1.2] march. 10, 2000 add 128mb c-die/256mb b-die based module spd. ? spd spec list m464s0424ct1-l75/c75 m464s0424dt1-l75/c75 m464s0824ct1-l75/c75 m464s0824dt1-l75/c75 M464S0924BT1-l75/c75 m464s0924ct1-l75/c75 m464s1724bt1-l75/c75 m464s1724ct1-l75/c75 m464s1654at1-l75/c75 m464s1654bt1-l75/c75 m464s3254at1-l75/c75 m464s3254bt1-l75/c75
serial presence detect pc133 sodimm rev. 1.2 march. 2000 byte # function described function supported hex value note -75 -75 0 # of bytes written into serial memory at module manufacturer 128bytes 80h 1 total # of bytes of spd memory device 256bytes (2k-bit) 08h 2 fundamental memory type sdram 04h 3 # of row address on this assembly 12 0ch 1 4 # of column address on this assembly 8 08h 1 5 # of module rows on this assembly 1 row 01h 6 data width of this assembly 64 bits 40h 7 ...... data width of this assembly - 00h 8 voltage interface standard of this assembly lvttl 01h 9 sdram cycle time from clock @cas latency of 3 7.5ns 75h 2 10 sdram access time from clock @cas latency of 3 5.4ns 54h 2 11 dimm configuraion type non parity 00h 12 refresh rate & type 15.625us, support self refresh 80h 13 primary sdram width x16 10h 14 error checking sdram width none 00h 15 minimum clock dealy for back-to-back random column address t ccd = 1clk 01h 16 sdram device attributes : burst lengths supported 1, 2, 4, 8 & full page 8fh 17 sdram device attributes : # of banks on sdram device 4 banks 04h 18 sdram device attributes : cas latency 3 04h 19 sdram device attributes : cs latency 0 clk 01h 20 sdram device attributes : write latency 0 clk 01h 21 sdram module attributes non-buffered/non-registered & redundant addressing 00h 22 sdram device attributes : general +/- 10% voltage tolerance, burst read single bit write precharge all, auto precharge 0eh 23 sdram cycle time @cas latency of 2 - 00h 2 24 sdram access time @cas latency of 2 - 00h 2 25 sdram cycle time @cas latency of 1 - 00h 2 26 sdram access time @cas latency of 1 - 00h 2 27 minimum row precharge time (=t rp ) 20ns 14h 28 minimum row active to row active delay (t rrd ) 15ns 0fh 29 minimum ras to cas delay (=t rcd ) 20ns 14h 30 minimum activate precharge time (=t ras ) 45ns 2dh 31 module row density 1 row of 32mb 08h 32 command and address signal input setup time 1.5ns 15h 33 command and address signal input hold time 0.8ns 08h 34 data signal input setup time 1.5ns 15h m464s0424ct1-l75/c75(intel spd 1.2b ver. based) ? organization : 4mx64 ? composition : 4mx16 *4 ? used component part # : k4s641632c-tl75/tc75 ? # of rows in module : 1 row ? # of banks in component : 4 banks ? feature : 1,000 mil height & double sided component ? refresh : 4k/64ms ? contents :
serial presence detect pc133 sodimm rev. 1.2 march. 2000 serial presence detect information byte # function described function supported hex value note -75 -75 35 data signal input hold time 0.8ns 08h 36~61 superset information (maybe used in future) - 00h 62 spd data revision code intel 1.2b 12h 63 checksum for bytes 0 ~ 62 - 9bh 64 manufacturer jedec id code samsung ceh 65~71 ...... manufacturer jedec id code samsung 00h 72 manufacturing location onyang korea 01h 73 manufacturer part # (memory module) m 4dh 74 manufacturer part # (dimm configuration) 4 34h 75 manufacturer part # (data bits) blank 20h 76 ...... manufacturer part # (data bits) 6 36h 77 ...... manufacturer part # (data bits) 4 34h 78 manufacturer part # (mode & operating voltage) s 53h 79 manufacturer part # (module depth) 0 30h 80 ...... manufacturer part # (module depth) 4 34h 81 manufacturer part # (refresh, #of banks in comp. & inter- 2 32h 82 manufacturer part # (composition component) 4 34h 83 manufacturer part # (component revision) c 43h 84 manufacturer part # (package type) t 54h 85 manufacturer part # (pcb revision & type) 1 31h 86 manufacturer part # (hyphen) " - " 2dh 87 manufacturer part # (power) l c 4ch 43h 88 manufacturer part # (minimum cycle time) 7 37h 89 manufacturer part # (minimum cycle time) 5 35h 90 manufacturer part # (tbd) blank 20h 91 manufacturer revision code (for pcb) 1 31h 92 ...... manufacturer revision code (for component) c-die (4th gen.) 43h 93 manufacturing date (week) - - 3 94 manufacturing date (year) - - 3 95~98 assembly serial # - - 4 99~125 manufacturer specific data (may be used in future) undefined - 5 126 reserved - 64h 6 127 reserved detailed pc100 information 8dh 6 128+ unused storage locations undefined - 5 1. the bank select address is excluded in counting the total # of addresses. 2. this value is based on the component specification. 3. these bytes are programmed by code of date week & date year with bcd format. 4. these bytes are programmed by samsung s own assembly serial # system. all modules may have different unique serial #. 5. these values apply to pc100 applications only, per intel pc66/pc100 spd standards. note :
serial presence detect pc133 sodimm rev. 1.2 march. 2000 byte # function described function supported hex value note -75 -75 0 # of bytes written into serial memory at module manufacturer 128bytes 80h 1 total # of bytes of spd memory device 256bytes (2k-bit) 08h 2 fundamental memory type sdram 04h 3 # of row address on this assembly 12 0ch 1 4 # of column address on this assembly 8 08h 1 5 # of module rows on this assembly 1 row 01h 6 data width of this assembly 64 bits 40h 7 ...... data width of this assembly - 00h 8 voltage interface standard of this assembly lvttl 01h 9 sdram cycle time from clock @cas latency of 3 7.5ns 75h 2 10 sdram access time from clock @cas latency of 3 5.4ns 54h 2 11 dimm configuraion type non parity 00h 12 refresh rate & type 15.625us, support self refresh 80h 13 primary sdram width x16 10h 14 error checking sdram width none 00h 15 minimum clock dealy for back-to-back random column address t ccd = 1clk 01h 16 sdram device attributes : burst lengths supported 1, 2, 4, 8 & full page 8fh 17 sdram device attributes : # of banks on sdram device 4 banks 04h 18 sdram device attributes : cas latency 3 04h 19 sdram device attributes : cs latency 0 clk 01h 20 sdram device attributes : write latency 0 clk 01h 21 sdram module attributes non-buffered/non-registered & redundant addressing 00h 22 sdram device attributes : general +/- 10% voltage tolerance, burst read single bit write precharge all, auto precharge 0eh 23 sdram cycle time @cas latency of 2 - 00h 2 24 sdram access time @cas latency of 2 - 00h 2 25 sdram cycle time @cas latency of 1 - 00h 2 26 sdram access time @cas latency of 1 - 00h 2 27 minimum row precharge time (=t rp ) 20ns 14h 28 minimum row active to row active delay (t rrd ) 15ns 0fh 29 minimum ras to cas delay (=t rcd ) 20ns 14h 30 minimum activate precharge time (=t ras ) 45ns 2dh 31 module row density 1 row of 32mb 08h 32 command and address signal input setup time 1.5ns 15h 33 command and address signal input hold time 0.8ns 08h 34 data signal input setup time 1.5ns 15h m464s0424dt1-l75/c75(intel spd 1.2b ver. based) ? organization : 4mx64 ? composition : 4mx16 *4 ? used component part # : k4s641632d-tl75/tc75 ? # of rows in module : 1 row ? # of banks in component : 4 banks ? feature : 1,000 mil height & double sided component ? refresh : 4k/64ms ? contents :
serial presence detect pc133 sodimm rev. 1.2 march. 2000 serial presence detect information byte # function described function supported hex value note -75 -75 35 data signal input hold time 0.8ns 08h 36~61 superset information (maybe used in future) - 00h 62 spd data revision code intel 1.2b 12h 63 checksum for bytes 0 ~ 62 - 9bh 64 manufacturer jedec id code samsung ceh 65~71 ...... manufacturer jedec id code samsung 00h 72 manufacturing location onyang korea 01h 73 manufacturer part # (memory module) m 4dh 74 manufacturer part # (dimm configuration) 4 34h 75 manufacturer part # (data bits) blank 20h 76 ...... manufacturer part # (data bits) 6 36h 77 ...... manufacturer part # (data bits) 4 34h 78 manufacturer part # (mode & operating voltage) s 53h 79 manufacturer part # (module depth) 0 30h 80 ...... manufacturer part # (module depth) 4 34h 81 manufacturer part # (refresh, #of banks in comp. & inter- 2 32h 82 manufacturer part # (composition component) 4 34h 83 manufacturer part # (component revision) d 44h 84 manufacturer part # (package type) t 54h 85 manufacturer part # (pcb revision & type) 1 31h 86 manufacturer part # (hyphen) " - " 2dh 87 manufacturer part # (power) l c 4ch 43h 88 manufacturer part # (minimum cycle time) 7 37h 89 manufacturer part # (minimum cycle time) 5 35h 90 manufacturer part # (tbd) blank 20h 91 manufacturer revision code (for pcb) 1 31h 92 ...... manufacturer revision code (for component) d-die (5th gen.) 44h 93 manufacturing date (week) - - 3 94 manufacturing date (year) - - 3 95~98 assembly serial # - - 4 99~125 manufacturer specific data (may be used in future) undefined - 5 126 reserved - 64h 6 127 reserved detailed pc100 information 8dh 6 128+ unused storage locations undefined - 5 1. the bank select address is excluded in counting the total # of addresses. 2. this value is based on the component specification. 3. these bytes are programmed by code of date week & date year with bcd format. 4. these bytes are programmed by samsung s own assembly serial # system. all modules may have different unique serial #. 5. these values apply to pc100 applications only, per intel pc66/pc100 spd standards. note :
serial presence detect pc133 sodimm rev. 1.2 march. 2000 byte # function described function supported hex value note -75 -75 0 # of bytes written into serial memory at module manufacturer 128bytes 80h 1 total # of bytes of spd memory device 256bytes (2k-bit) 08h 2 fundamental memory type sdram 04h 3 # of row address on this assembly 12 0ch 1 4 # of column address on this assembly 8 08h 1 5 # of module rows on this assembly 2 rows 02h 6 data width of this assembly 64 bits 40h 7 ...... data width of this assembly - 00h 8 voltage interface standard of this assembly lvttl 01h 9 sdram cycle time from clock @cas latency of 3 7.5ns 75h 2 10 sdram access time from clock @cas latency of 3 5.4ns 54h 2 11 dimm configuraion type non parity 00h 12 refresh rate & type 15.625us, support self refresh 80h 13 primary sdram width x16 10h 14 error checking sdram width none 00h 15 minimum clock dealy for back-to-back random column address t ccd = 1clk 01h 16 sdram device attributes : burst lengths supported 1, 2, 4, 8 & full page 8fh 17 sdram device attributes : # of banks on sdram device 4 banks 04h 18 sdram device attributes : cas latency 3 04h 19 sdram device attributes : cs latency 0 clk 01h 20 sdram device attributes : write latency 0 clk 01h 21 sdram module attributes non-buffered/non-registered & redundant addressing 00h 22 sdram device attributes : general +/- 10% voltage tolerance, burst read single bit write precharge all, auto precharge 0eh 23 sdram cycle time @cas latency of 2 - 00h 2 24 sdram access time @cas latency of 2 - 00h 2 25 sdram cycle time @cas latency of 1 - 00h 2 26 sdram access time @cas latency of 1 - 00h 2 27 minimum row precharge time (=t rp ) 20ns 14h 28 minimum row active to row active delay (t rrd ) 15ns 0fh 29 minimum ras to cas delay (=t rcd ) 20ns 14h 30 minimum activate precharge time (=t ras ) 45ns 2dh 31 module row density 2 rows of 32mb 08h 32 command and address signal input setup time 1.5ns 15h 33 command and address signal input hold time 0.8ns 08h 34 data signal input setup time 1.5ns 15h m464s0824ct1-l75/c75(intel spd 1.2b ver. based) ? organization : 8mx64 ? composition : 4mx16 *8 ? used component part # : k4s641632c-tl75/tc75 ? # of rows in module : 2 rows ? # of banks in component : 4 banks ? feature : 1,250 mil height & double sided component ? refresh : 4k/64ms ? contents :
serial presence detect pc133 sodimm rev. 1.2 march. 2000 serial presence detect information byte # function described function supported hex value note -75 -75 35 data signal input hold time 0.8ns 08h 36~61 superset information (maybe used in future) - 00h 62 spd data revision code intel 1.2b 12h 63 checksum for bytes 0 ~ 62 - 9ch 64 manufacturer jedec id code samsung ceh 65~71 ...... manufacturer jedec id code samsung 00h 72 manufacturing location onyang korea 01h 73 manufacturer part # (memory module) m 4dh 74 manufacturer part # (dimm configuration) 4 34h 75 manufacturer part # (data bits) blank 20h 76 ...... manufacturer part # (data bits) 6 36h 77 ...... manufacturer part # (data bits) 4 34h 78 manufacturer part # (mode & operating voltage) s 53h 79 manufacturer part # (module depth) 0 30h 80 ...... manufacturer part # (module depth) 8 38h 81 manufacturer part # (refresh, #of banks in comp. & inter- 2 32h 82 manufacturer part # (composition component) 4 34h 83 manufacturer part # (component revision) c 43h 84 manufacturer part # (package type) t 54h 85 manufacturer part # (pcb revision & type) 1 31h 86 manufacturer part # (hyphen) " - " 2dh 87 manufacturer part # (power) l c 4ch 43h 88 manufacturer part # (minimum cycle time) 7 37h 89 manufacturer part # (minimum cycle time) 5 35h 90 manufacturer part # (tbd) blank 20h 91 manufacturer revision code (for pcb) 1 31h 92 ...... manufacturer revision code (for component) c-die (4th gen.) 43h 93 manufacturing date (week) - - 3 94 manufacturing date (year) - - 3 95~98 assembly serial # - - 4 99~125 manufacturer specific data (may be used in future) undefined - 5 126 reserved - 64h 6 127 reserved detailed pc100 information cdh 6 128+ unused storage locations undefined - 5 1. the bank select address is excluded in counting the total # of addresses. 2. this value is based on the component specification. 3. these bytes are programmed by code of date week & date year with bcd format. 4. these bytes are programmed by samsung s own assembly serial # system. all modules may have different unique serial #. 5. these values apply to pc100 applications only, per intel pc66/pc100 spd standards. note :
serial presence detect pc133 sodimm rev. 1.2 march. 2000 byte # function described function supported hex value note -75 -75 0 # of bytes written into serial memory at module manufacturer 128bytes 80h 1 total # of bytes of spd memory device 256bytes (2k-bit) 08h 2 fundamental memory type sdram 04h 3 # of row address on this assembly 12 0ch 1 4 # of column address on this assembly 8 08h 1 5 # of module rows on this assembly 2 rows 02h 6 data width of this assembly 64 bits 40h 7 ...... data width of this assembly - 00h 8 voltage interface standard of this assembly lvttl 01h 9 sdram cycle time from clock @cas latency of 3 7.5ns 75h 2 10 sdram access time from clock @cas latency of 3 5.4ns 54h 2 11 dimm configuraion type non parity 00h 12 refresh rate & type 15.625us, support self refresh 80h 13 primary sdram width x16 10h 14 error checking sdram width none 00h 15 minimum clock dealy for back-to-back random column address t ccd = 1clk 01h 16 sdram device attributes : burst lengths supported 1, 2, 4, 8 & full page 8fh 17 sdram device attributes : # of banks on sdram device 4 banks 04h 18 sdram device attributes : cas latency 3 04h 19 sdram device attributes : cs latency 0 clk 01h 20 sdram device attributes : write latency 0 clk 01h 21 sdram module attributes non-buffered/non-registered & redundant addressing 00h 22 sdram device attributes : general +/- 10% voltage tolerance, burst read single bit write precharge all, auto precharge 0eh 23 sdram cycle time @cas latency of 2 - 00h 2 24 sdram access time @cas latency of 2 - 00h 2 25 sdram cycle time @cas latency of 1 - 00h 2 26 sdram access time @cas latency of 1 - 00h 2 27 minimum row precharge time (=t rp ) 20ns 14h 28 minimum row active to row active delay (t rrd ) 15ns 0fh 29 minimum ras to cas delay (=t rcd ) 20ns 14h 30 minimum activate precharge time (=t ras ) 45ns 2dh 31 module row density 2 rows of 32mb 08h 32 command and address signal input setup time 1.5ns 15h 33 command and address signal input hold time 0.8ns 08h 34 data signal input setup time 1.5ns 15h m464s0824dt1-l75/c75(intel spd 1.2b ver. based) ? organization : 8mx64 ? composition : 4mx16 *8 ? used component part # : k4s641632d-tl75/tc75 ? # of rows in module : 2 rows ? # of banks in component : 4 banks ? feature : 1,250 mil height & double sided component ? refresh : 4k/64ms ? contents :
serial presence detect pc133 sodimm rev. 1.2 march. 2000 serial presence detect information byte # function described function supported hex value note -75 -75 35 data signal input hold time 0.8ns 08h 36~61 superset information (maybe used in future) - 00h 62 spd data revision code intel 1.2b 12h 63 checksum for bytes 0 ~ 62 - 9ch 64 manufacturer jedec id code samsung ceh 65~71 ...... manufacturer jedec id code samsung 00h 72 manufacturing location onyang korea 01h 73 manufacturer part # (memory module) m 4dh 74 manufacturer part # (dimm configuration) 4 34h 75 manufacturer part # (data bits) blank 20h 76 ...... manufacturer part # (data bits) 6 36h 77 ...... manufacturer part # (data bits) 4 34h 78 manufacturer part # (mode & operating voltage) s 53h 79 manufacturer part # (module depth) 0 30h 80 ...... manufacturer part # (module depth) 8 38h 81 manufacturer part # (refresh, #of banks in comp. & inter- 2 32h 82 manufacturer part # (composition component) 4 34h 83 manufacturer part # (component revision) d 44h 84 manufacturer part # (package type) t 54h 85 manufacturer part # (pcb revision & type) 1 31h 86 manufacturer part # (hyphen) " - " 2dh 87 manufacturer part # (power) l c 4ch 43h 88 manufacturer part # (minimum cycle time) 7 37h 89 manufacturer part # (minimum cycle time) 5 35h 90 manufacturer part # (tbd) blank 20h 91 manufacturer revision code (for pcb) 1 31h 92 ...... manufacturer revision code (for component) d-die (5th gen.) 44h 93 manufacturing date (week) - - 3 94 manufacturing date (year) - - 3 95~98 assembly serial # - - 4 99~125 manufacturer specific data (may be used in future) undefined - 5 126 reserved - 64h 6 127 reserved detailed pc100 information cdh 6 128+ unused storage locations undefined - 5 1. the bank select address is excluded in counting the total # of addresses. 2. this value is based on the component specification. 3. these bytes are programmed by code of date week & date year with bcd format. 4. these bytes are programmed by samsung s own assembly serial # system. all modules may have different unique serial #. 5. these values apply to pc100 applications only, per intel pc66/pc100 spd standards. note :
serial presence detect pc133 sodimm rev. 1.2 march. 2000 byte # function described function supported hex value note -75 -75 0 # of bytes written into serial memory at module manufacturer 128bytes 80h 1 total # of bytes of spd memory device 256bytes (2k-bit) 08h 2 fundamental memory type sdram 04h 3 # of row address on this assembly 12 0ch 1 4 # of column address on this assembly 9 09h 1 5 # of module rows on this assembly 1 row 01h 6 data width of this assembly 64 bits 40h 7 ...... data width of this assembly - 00h 8 voltage interface standard of this assembly lvttl 01h 9 sdram cycle time from clock @cas latency of 3 7.5ns 75h 2 10 sdram access time from clock @cas latency of 3 5.4ns 54h 2 11 dimm configuraion type non parity 00h 12 refresh rate & type 15.625us, support self refresh 80h 13 primary sdram width x16 10h 14 error checking sdram width none 00h 15 minimum clock dealy for back-to-back random column address t ccd = 1clk 01h 16 sdram device attributes : burst lengths supported 1, 2, 4, 8 & full page 8fh 17 sdram device attributes : # of banks on sdram device 4 banks 04h 18 sdram device attributes : cas latency 3 04h 19 sdram device attributes : cs latency 0 clk 01h 20 sdram device attributes : write latency 0 clk 01h 21 sdram module attributes non-buffered/non-registered & redundant addressing 00h 22 sdram device attributes : general +/- 10% voltage tolerance, burst read single bit write precharge all, auto precharge 0eh 23 sdram cycle time @cas latency of 2 - 00h 2 24 sdram access time @cas latency of 2 - 00h 2 25 sdram cycle time @cas latency of 1 - 00h 2 26 sdram access time @cas latency of 1 - 00h 2 27 minimum row precharge time (=t rp ) 20ns 14h 28 minimum row active to row active delay (t rrd ) 15ns 0fh 29 minimum ras to cas delay (=t rcd ) 20ns 14h 30 minimum activate precharge time (=t ras ) 45ns 2dh 31 module row density 1 row of 64mb 10h 32 command and address signal input setup time 1.5ns 15h 33 command and address signal input hold time 0.8ns 08h 34 data signal input setup time 1.5ns 15h M464S0924BT1-l75/c75(intel spd 1.2b ver. based) ? organization : 8mx64 ? composition : 8mx16 *4 ? used component part # : k4s281632b-tl75/tc75 ? # of rows in module : 1 row ? # of banks in component : 4 banks ? feature : 1,000 mil height & double sided component ? refresh : 4k/64ms ? contents :
serial presence detect pc133 sodimm rev. 1.2 march. 2000 serial presence detect information byte # function described function supported hex value note -75 -75 35 data signal input hold time 0.8ns 08h 36~61 superset information (maybe used in future) - 00h 62 spd data revision code intel 1.2b 12h 63 checksum for bytes 0 ~ 62 - a4h 64 manufacturer jedec id code samsung ceh 65~71 ...... manufacturer jedec id code samsung 00h 72 manufacturing location onyang korea 01h 73 manufacturer part # (memory module) m 4dh 74 manufacturer part # (dimm configuration) 4 34h 75 manufacturer part # (data bits) blank 20h 76 ...... manufacturer part # (data bits) 6 36h 77 ...... manufacturer part # (data bits) 4 34h 78 manufacturer part # (mode & operating voltage) s 53h 79 manufacturer part # (module depth) 0 30h 80 ...... manufacturer part # (module depth) 9 39h 81 manufacturer part # (refresh, #of banks in comp. & inter- 2 32h 82 manufacturer part # (composition component) 4 34h 83 manufacturer part # (component revision) b 42h 84 manufacturer part # (package type) t 54h 85 manufacturer part # (pcb revision & type) 1 31h 86 manufacturer part # (hyphen) " - " 2dh 87 manufacturer part # (power) l c 4ch 43h 88 manufacturer part # (minimum cycle time) 7 37h 89 manufacturer part # (minimum cycle time) 5 35h 90 manufacturer part # (tbd) blank 20h 91 manufacturer revision code (for pcb) 1 31h 92 ...... manufacturer revision code (for component) b-die (3rd gen.) 42h 93 manufacturing date (week) - - 3 94 manufacturing date (year) - - 3 95~98 assembly serial # - - 4 99~12 manufacturer specific data (may be used in future) undefined - 5 126 reserved - 64h 6 127 reserved detailed pc100 information 8dh 6 128+ unused storage locations undefined - 5 1. the bank select address is excluded in counting the total # of addresses. 2. this value is based on the component specification. 3. these bytes are programmed by code of date week & date year with bcd format. 4. these bytes are programmed by samsung s own assembly serial # system. all modules may have different unique serial #. 5. these bytes are undefined and can be used for samsung?s own purpose. 6. these values apply to pc100 applications only, per intel pc66/pc100 spd standards. note :
serial presence detect pc133 sodimm rev. 1.2 march. 2000 byte # function described function supported hex value note -75 -75 0 # of bytes written into serial memory at module manufacturer 128bytes 80h 1 total # of bytes of spd memory device 256bytes (2k-bit) 08h 2 fundamental memory type sdram 04h 3 # of row address on this assembly 12 0ch 1 4 # of column address on this assembly 9 09h 1 5 # of module rows on this assembly 1 row 01h 6 data width of this assembly 64 bits 40h 7 ...... data width of this assembly - 00h 8 voltage interface standard of this assembly lvttl 01h 9 sdram cycle time from clock @cas latency of 3 7.5ns 75h 2 10 sdram access time from clock @cas latency of 3 5.4ns 54h 2 11 dimm configuraion type non parity 00h 12 refresh rate & type 15.625us, support self refresh 80h 13 primary sdram width x16 10h 14 error checking sdram width none 00h 15 minimum clock dealy for back-to-back random column address t ccd = 1clk 01h 16 sdram device attributes : burst lengths supported 1, 2, 4, 8 & full page 8fh 17 sdram device attributes : # of banks on sdram device 4 banks 04h 18 sdram device attributes : cas latency 3 04h 19 sdram device attributes : cs latency 0 clk 01h 20 sdram device attributes : write latency 0 clk 01h 21 sdram module attributes non-buffered/non-registered & redundant addressing 00h 22 sdram device attributes : general +/- 10% voltage tolerance, burst read single bit write precharge all, auto precharge 0eh 23 sdram cycle time @cas latency of 2 - 00h 2 24 sdram access time @cas latency of 2 - 00h 2 25 sdram cycle time @cas latency of 1 - 00h 2 26 sdram access time @cas latency of 1 - 00h 2 27 minimum row precharge time (=t rp ) 20ns 14h 28 minimum row active to row active delay (t rrd ) 15ns 0fh 29 minimum ras to cas delay (=t rcd ) 20ns 14h 30 minimum activate precharge time (=t ras ) 45ns 2dh 31 module row density 1 row of 64mb 10h 32 command and address signal input setup time 1.5ns 15h 33 command and address signal input hold time 0.8ns 08h 34 data signal input setup time 1.5ns 15h m464s0924ct1-l75/c75(intel spd 1.2b ver. based) ? organization : 8mx64 ? composition : 8mx16 *4 ? used component part # : k4s281632c-tl75/tc75 ? # of rows in module : 1 row ? # of banks in component : 4 banks ? feature : 1,000 mil height & double sided component ? refresh : 4k/64ms ? contents :
serial presence detect pc133 sodimm rev. 1.2 march. 2000 serial presence detect information byte # function described function supported hex value note -75 -75 35 data signal input hold time 0.8ns 08h 36~61 superset information (maybe used in future) - 00h 62 spd data revision code intel 1.2b 12h 63 checksum for bytes 0 ~ 62 - a4h 64 manufacturer jedec id code samsung ceh 65~71 ...... manufacturer jedec id code samsung 00h 72 manufacturing location onyang korea 01h 73 manufacturer part # (memory module) m 4dh 74 manufacturer part # (dimm configuration) 4 34h 75 manufacturer part # (data bits) blank 20h 76 ...... manufacturer part # (data bits) 6 36h 77 ...... manufacturer part # (data bits) 4 34h 78 manufacturer part # (mode & operating voltage) s 53h 79 manufacturer part # (module depth) 0 30h 80 ...... manufacturer part # (module depth) 9 39h 81 manufacturer part # (refresh, #of banks in comp. & inter- 2 32h 82 manufacturer part # (composition component) 4 34h 83 manufacturer part # (component revision) c 43h 84 manufacturer part # (package type) t 54h 85 manufacturer part # (pcb revision & type) 1 31h 86 manufacturer part # (hyphen) " - " 2dh 87 manufacturer part # (power) l c 4ch 43h 88 manufacturer part # (minimum cycle time) 7 37h 89 manufacturer part # (minimum cycle time) 5 35h 90 manufacturer part # (tbd) blank 20h 91 manufacturer revision code (for pcb) 1 31h 92 ...... manufacturer revision code (for component) c-die (4th gen.) 43h 93 manufacturing date (week) - - 3 94 manufacturing date (year) - - 3 95~98 assembly serial # - - 4 99~12 manufacturer specific data (may be used in future) undefined - 5 126 reserved - 64h 6 127 reserved detailed pc100 information 8dh 6 128+ unused storage locations undefined - 5 1. the bank select address is excluded in counting the total # of addresses. 2. this value is based on the component specification. 3. these bytes are programmed by code of date week & date year with bcd format. 4. these bytes are programmed by samsung s own assembly serial # system. all modules may have different unique serial #. 5. these bytes are undefined and can be used for samsung?s own purpose. 6. these values apply to pc100 applications only, per intel pc66/pc100 spd standards. note :
serial presence detect pc133 sodimm rev. 1.2 march. 2000 byte # function described function supported hex value note -75 -75 0 # of bytes written into serial memory at module manufacturer 128bytes 80h 1 total # of bytes of spd memory device 256bytes (2k-bit) 08h 2 fundamental memory type sdram 04h 3 # of row address on this assembly 12 0ch 1 4 # of column address on this assembly 9 09h 1 5 # of module rows on this assembly 2 rows 02h 6 data width of this assembly 64 bits 40h 7 ...... data width of this assembly - 00h 8 voltage interface standard of this assembly lvttl 01h 9 sdram cycle time from clock @cas latency of 3 7.5ns 75h 2 10 sdram access time from clock @cas latency of 3 5.4ns 54h 2 11 dimm configuraion type non parity 00h 12 refresh rate & type 15.625us, support self refresh 80h 13 primary sdram width x16 10h 14 error checking sdram width none 00h 15 minimum clock dealy for back-to-back random column address t ccd = 1clk 01h 16 sdram device attributes : burst lengths supported 1, 2, 4, 8 & full page 8fh 17 sdram device attributes : # of banks on sdram device 4 banks 04h 18 sdram device attributes : cas latency 3 04h 19 sdram device attributes : cs latency 0 clk 01h 20 sdram device attributes : write latency 0 clk 01h 21 sdram module attributes non-buffered/non-registered & redundant addressing 00h 22 sdram device attributes : general +/- 10% voltage tolerance, burst read single bit write precharge all, auto precharge 0eh 23 sdram cycle time @cas latency of 2 - 00h 2 24 sdram access time @cas latency of 2 - 00h 2 25 sdram cycle time @cas latency of 1 - 00h 2 26 sdram access time @cas latency of 1 - 00h 2 27 minimum row precharge time (=t rp ) 20ns 14h 28 minimum row active to row active delay (t rrd ) 15ns 0fh 29 minimum ras to cas delay (=t rcd ) 20ns 14h 30 minimum activate precharge time (=t ras ) 45ns 2dh 31 module row density 2 rows of 64mb 10h 32 command and address signal input setup time 1.5ns 15h 33 command and address signal input hold time 0.8ns 08h 34 data signal input setup time 1.5ns 15h m464s1724bt1-l75/c75(intel spd 1.2b ver. based) ? organization : 16mx64 ? composition : 8mx16 *8 ? used component part # : k4s281632b-tl75/tc75 ? # of rows in module : 2 rows ? # of banks in component : 4 banks ? feature : 1,250 mil height & double sided component ? refresh : 4k/64ms ? contents :
serial presence detect pc133 sodimm rev. 1.2 march. 2000 serial presence detect information byte # function described function supported hex value note -75 -75 35 data signal input hold time 0.8ns 08h 36~61 superset information (maybe used in future) - 00h 62 spd data revision code intel 1.2b 12h 63 checksum for bytes 0 ~ 62 - a5h 64 manufacturer jedec id code samsung ceh 65~71 ...... manufacturer jedec id code samsung 00h 72 manufacturing location onyang korea 01h 73 manufacturer part # (memory module) m 4dh 74 manufacturer part # (dimm configuration) 4 34h 75 manufacturer part # (data bits) blank 20h 76 ...... manufacturer part # (data bits) 6 36h 77 ...... manufacturer part # (data bits) 4 34h 78 manufacturer part # (mode & operating voltage) s 53h 79 manufacturer part # (module depth) 1 31h 80 ...... manufacturer part # (module depth) 7 37h 81 manufacturer part # (refresh, #of banks in comp. & inter- 2 32h 82 manufacturer part # (composition component) 4 34h 83 manufacturer part # (component revision) b 42h 84 manufacturer part # (package type) t 54h 85 manufacturer part # (pcb revision & type) 1 31h 86 manufacturer part # (hyphen) " - " 2dh 87 manufacturer part # (power) l c 4ch 43h 88 manufacturer part # (minimum cycle time) 7 37h 89 manufacturer part # (minimum cycle time) 5 35h 90 manufacturer part # (tbd) blank 20h 91 manufacturer revision code (for pcb) 1 31h 92 ...... manufacturer revision code (for component) b-die (3rd gen.) 42h 93 manufacturing date (week) - - 3 94 manufacturing date (year) - - 3 95~98 assembly serial # - - 4 99~125 manufacturer specific data (may be used in future) undefined - 5 126 reserved - 64h 6 127 reserved detailed pc100 information cdh 6 128+ unused storage locations undefined - 5 1. the bank select address is excluded in counting the total # of addresses. 2. this value is based on the component specification. 3. these bytes are programmed by code of date week & date year with bcd format. 4. these bytes are programmed by samsung s own assembly serial # system. all modules may have different unique serial #. 5. these bytes are undefined and can be used for samsung?s own purpose. 6. these values apply to pc100 applications only, per intel pc66/pc100 spd standards. note :
serial presence detect pc133 sodimm rev. 1.2 march. 2000 byte # function described function supported hex value note -75 -75 0 # of bytes written into serial memory at module manufacturer 128bytes 80h 1 total # of bytes of spd memory device 256bytes (2k-bit) 08h 2 fundamental memory type sdram 04h 3 # of row address on this assembly 12 0ch 1 4 # of column address on this assembly 9 09h 1 5 # of module rows on this assembly 2 rows 02h 6 data width of this assembly 64 bits 40h 7 ...... data width of this assembly - 00h 8 voltage interface standard of this assembly lvttl 01h 9 sdram cycle time from clock @cas latency of 3 7.5ns 75h 2 10 sdram access time from clock @cas latency of 3 5.4ns 54h 2 11 dimm configuraion type non parity 00h 12 refresh rate & type 15.625us, support self refresh 80h 13 primary sdram width x16 10h 14 error checking sdram width none 00h 15 minimum clock dealy for back-to-back random column address t ccd = 1clk 01h 16 sdram device attributes : burst lengths supported 1, 2, 4, 8 & full page 8fh 17 sdram device attributes : # of banks on sdram device 4 banks 04h 18 sdram device attributes : cas latency 3 04h 19 sdram device attributes : cs latency 0 clk 01h 20 sdram device attributes : write latency 0 clk 01h 21 sdram module attributes non-buffered/non-registered & redundant addressing 00h 22 sdram device attributes : general +/- 10% voltage tolerance, burst read single bit write precharge all, auto precharge 0eh 23 sdram cycle time @cas latency of 2 - 00h 2 24 sdram access time @cas latency of 2 - 00h 2 25 sdram cycle time @cas latency of 1 - 00h 2 26 sdram access time @cas latency of 1 - 00h 2 27 minimum row precharge time (=t rp ) 20ns 14h 28 minimum row active to row active delay (t rrd ) 15ns 0fh 29 minimum ras to cas delay (=t rcd ) 20ns 14h 30 minimum activate precharge time (=t ras ) 45ns 2dh 31 module row density 2 rows of 64mb 10h 32 command and address signal input setup time 1.5ns 15h 33 command and address signal input hold time 0.8ns 08h 34 data signal input setup time 1.5ns 15h m464s1724ct1-l75/c75(intel spd 1.2b ver. based) ? organization : 16mx64 ? composition : 8mx16 *8 ? used component part # : k4s281632c-tl75/tc75 ? # of rows in module : 2 rows ? # of banks in component : 4 banks ? feature : 1,250 mil height & double sided component ? refresh : 4k/64ms ? contents :
serial presence detect pc133 sodimm rev. 1.2 march. 2000 serial presence detect information byte # function described function supported hex value note -75 -75 35 data signal input hold time 0.8ns 08h 36~61 superset information (maybe used in future) - 00h 62 spd data revision code intel 1.2b 12h 63 checksum for bytes 0 ~ 62 - a5h 64 manufacturer jedec id code samsung ceh 65~71 ...... manufacturer jedec id code samsung 00h 72 manufacturing location onyang korea 01h 73 manufacturer part # (memory module) m 4dh 74 manufacturer part # (dimm configuration) 4 34h 75 manufacturer part # (data bits) blank 20h 76 ...... manufacturer part # (data bits) 6 36h 77 ...... manufacturer part # (data bits) 4 34h 78 manufacturer part # (mode & operating voltage) s 53h 79 manufacturer part # (module depth) 1 31h 80 ...... manufacturer part # (module depth) 7 37h 81 manufacturer part # (refresh, #of banks in comp. & inter- 2 32h 82 manufacturer part # (composition component) 4 34h 83 manufacturer part # (component revision) c 43h 84 manufacturer part # (package type) t 54h 85 manufacturer part # (pcb revision & type) 1 31h 86 manufacturer part # (hyphen) " - " 2dh 87 manufacturer part # (power) l c 4ch 43h 88 manufacturer part # (minimum cycle time) 7 37h 89 manufacturer part # (minimum cycle time) 5 35h 90 manufacturer part # (tbd) blank 20h 91 manufacturer revision code (for pcb) 1 31h 92 ...... manufacturer revision code (for component) c-die (4th gen.) 43h 93 manufacturing date (week) - - 3 94 manufacturing date (year) - - 3 95~98 assembly serial # - - 4 99~125 manufacturer specific data (may be used in future) undefined - 5 126 reserved - 64h 6 127 reserved detailed pc100 information cdh 6 128+ unused storage locations undefined - 5 1. the bank select address is excluded in counting the total # of addresses. 2. this value is based on the component specification. 3. these bytes are programmed by code of date week & date year with bcd format. 4. these bytes are programmed by samsung s own assembly serial # system. all modules may have different unique serial #. 5. these bytes are undefined and can be used for samsung?s own purpose. 6. these values apply to pc100 applications only, per intel pc66/pc100 spd standards. note :
serial presence detect pc133 sodimm rev. 1.2 march. 2000 byte # function described function supported hex value note -75 -75 0 # of bytes written into serial memory at module manufacturer 128bytes 80h 1 total # of bytes of spd memory device 256bytes (2k-bit) 08h 2 fundamental memory type sdram 04h 3 # of row address on this assembly 13 0dh 1 4 # of column address on this assembly 9 09h 1 5 # of module rows on this assembly 1 row 01h 6 data width of this assembly 64 bits 40h 7 ...... data width of this assembly - 00h 8 voltage interface standard of this assembly lvttl 01h 9 sdram cycle time from clock @cas latency of 3 7.5ns 75h 2 10 sdram access time from clock @cas latency of 3 5.4ns 54h 2 11 dimm configuraion type non parity 00h 12 refresh rate & type 7.8us, support self refresh self 82h 13 primary sdram width x16 10h 14 error checking sdram width none 00h 15 minimum clock dealy for back-to-back random column address t ccd = 1clk 01h 16 sdram device attributes : burst lengths supported 1, 2, 4, 8 & full page 8fh 17 sdram device attributes : # of banks on sdram device 4 banks 04h 18 sdram device attributes : cas latency 3 04h 19 sdram device attributes : cs latency 0 clk 01h 20 sdram device attributes : write latency 0 clk 01h 21 sdram module attributes non-buffered/non-registered & redundant addressing 00h 22 sdram device attributes : general +/- 10% voltage tolerance, burst read single bit write precharge all, auto precharge 0eh 23 sdram cycle time @cas latency of 2 - 00h 2 24 sdram access time @cas latency of 2 - 00h 2 25 sdram cycle time @cas latency of 1 - 00h 2 26 sdram access time @cas latency of 1 - 00h 2 27 minimum row precharge time (=t rp ) 20ns 14h 28 minimum row active to row active delay (t rrd ) 15ns 0fh 29 minimum ras to cas delay (=t rcd ) 20ns 14h 30 minimum activate precharge time (=t ras ) 45ns 2dh 31 module row density 1 row of 128mb 20h 32 command and address signal input setup time 1.5ns 15h 33 command and address signal input hold time 0.8ns 08h 34 data signal input setup time 1.5ns 15h m464s1654at1-l75/c75(intel spd 1.2b ver. based) ? organization : 16mx64 ? composition : 16mx16 *4 ? used component part # : k4s561632a-tl75/tc75 ? # of rows in module : 1 row ? # of banks in component : 4 banks ? feature : 1,000 mil height & double sided component ? refresh : 8k/64ms ? contents :
serial presence detect pc133 sodimm rev. 1.2 march. 2000 serial presence detect information byte # function described function supported hex value note -75 -75 35 data signal input hold time 0.8ns 08h 36~61 superset information (maybe used in future) - 00h 62 spd data revision code intel 1.2b 12h 63 checksum for bytes 0 ~ 62 - b7h 64 manufacturer jedec id code samsung ceh 65~71 ...... manufacturer jedec id code samsung 00h 72 manufacturing location onyang korea 01h 73 manufacturer part # (memory module) m 4dh 74 manufacturer part # (dimm configuration) 4 34h 75 manufacturer part # (data bits) blank 20h 76 ...... manufacturer part # (data bits) 6 36h 77 ...... manufacturer part # (data bits) 4 34h 78 manufacturer part # (mode & operating voltage) s 53h 79 manufacturer part # (module depth) 1 31h 80 ...... manufacturer part # (module depth) 6 36h 81 manufacturer part # (refresh, #of banks in comp. & inter- 5 35h 82 manufacturer part # (composition component) 4 34h 83 manufacturer part # (component revision) a 41h 84 manufacturer part # (package type) t 54h 85 manufacturer part # (pcb revision & type) 1 31h 86 manufacturer part # (hyphen) " - " 2dh 87 manufacturer part # (power) l c 4ch 43h 88 manufacturer part # (minimum cycle time) 7 37h 89 manufacturer part # (minimum cycle time) 5 35h 90 manufacturer part # (tbd) blank 20h 91 manufacturer revision code (for pcb) 1 31h 92 ...... manufacturer revision code (for component) a-die (2nd gen.) 41h 93 manufacturing date (week) - - 3 94 manufacturing date (year) - - 3 95~98 assembly serial # - - 4 99~125 manufacturer specific data (may be used in future) undefined - 5 126 reserved - 64h 6 127 reserved detailed pc100 information 8dh 6 128+ unused storage locations undefined - 5 1. the bank select address is excluded in counting the total # of addresses. 2. this value is based on the component specification. 3. these bytes are programmed by code of date week & date year with bcd format. 4. these bytes are programmed by samsung s own assembly serial # system. all modules may have different unique serial #. 5. these bytes are undefined and can be used for samsung?s own purpose. 6. these values apply to pc100 applications only, per intel pc66/pc100 spd standards. note :
serial presence detect pc133 sodimm rev. 1.2 march. 2000 byte # function described function supported hex value note -75 -75 0 # of bytes written into serial memory at module manufacturer 128bytes 80h 1 total # of bytes of spd memory device 256bytes (2k-bit) 08h 2 fundamental memory type sdram 04h 3 # of row address on this assembly 13 0dh 1 4 # of column address on this assembly 9 09h 1 5 # of module rows on this assembly 1 row 01h 6 data width of this assembly 64 bits 40h 7 ...... data width of this assembly - 00h 8 voltage interface standard of this assembly lvttl 01h 9 sdram cycle time from clock @cas latency of 3 7.5ns 75h 2 10 sdram access time from clock @cas latency of 3 5.4ns 54h 2 11 dimm configuraion type non parity 00h 12 refresh rate & type 7.8us, support self refresh self 82h 13 primary sdram width x16 10h 14 error checking sdram width none 00h 15 minimum clock dealy for back-to-back random column address t ccd = 1clk 01h 16 sdram device attributes : burst lengths supported 1, 2, 4, 8 & full page 8fh 17 sdram device attributes : # of banks on sdram device 4 banks 04h 18 sdram device attributes : cas latency 3 04h 19 sdram device attributes : cs latency 0 clk 01h 20 sdram device attributes : write latency 0 clk 01h 21 sdram module attributes non-buffered/non-registered & redundant addressing 00h 22 sdram device attributes : general +/- 10% voltage tolerance, burst read single bit write precharge all, auto precharge 0eh 23 sdram cycle time @cas latency of 2 - 00h 2 24 sdram access time @cas latency of 2 - 00h 2 25 sdram cycle time @cas latency of 1 - 00h 2 26 sdram access time @cas latency of 1 - 00h 2 27 minimum row precharge time (=t rp ) 20ns 14h 28 minimum row active to row active delay (t rrd ) 15ns 0fh 29 minimum ras to cas delay (=t rcd ) 20ns 14h 30 minimum activate precharge time (=t ras ) 45ns 2dh 31 module row density 1 row of 128mb 20h 32 command and address signal input setup time 1.5ns 15h 33 command and address signal input hold time 0.8ns 08h 34 data signal input setup time 1.5ns 15h m464s1654bt1-l75/c75(intel spd 1.2b ver. based) ? organization : 16mx64 ? composition : 16mx16 *4 ? used component part # : k4s561632b-tl75/tc75 ? # of rows in module : 1 row ? # of banks in component : 4 banks ? feature : 1,000 mil height & double sided component ? refresh : 8k/64ms ? contents :
serial presence detect pc133 sodimm rev. 1.2 march. 2000 serial presence detect information byte # function described function supported hex value note -75 -75 35 data signal input hold time 0.8ns 08h 36~61 superset information (maybe used in future) - 00h 62 spd data revision code intel 1.2b 12h 63 checksum for bytes 0 ~ 62 - b7h 64 manufacturer jedec id code samsung ceh 65~71 ...... manufacturer jedec id code samsung 00h 72 manufacturing location onyang korea 01h 73 manufacturer part # (memory module) m 4dh 74 manufacturer part # (dimm configuration) 4 34h 75 manufacturer part # (data bits) blank 20h 76 ...... manufacturer part # (data bits) 6 36h 77 ...... manufacturer part # (data bits) 4 34h 78 manufacturer part # (mode & operating voltage) s 53h 79 manufacturer part # (module depth) 1 31h 80 ...... manufacturer part # (module depth) 6 36h 81 manufacturer part # (refresh, #of banks in comp. & inter- 5 35h 82 manufacturer part # (composition component) 4 34h 83 manufacturer part # (component revision) b 42h 84 manufacturer part # (package type) t 54h 85 manufacturer part # (pcb revision & type) 1 31h 86 manufacturer part # (hyphen) " - " 2dh 87 manufacturer part # (power) l c 4ch 43h 88 manufacturer part # (minimum cycle time) 7 37h 89 manufacturer part # (minimum cycle time) 5 35h 90 manufacturer part # (tbd) blank 20h 91 manufacturer revision code (for pcb) 1 31h 92 ...... manufacturer revision code (for component) b-die (3rd gen.) 42h 93 manufacturing date (week) - - 3 94 manufacturing date (year) - - 3 95~98 assembly serial # - - 4 99~125 manufacturer specific data (may be used in future) undefined - 5 126 reserved - 64h 6 127 reserved detailed pc100 information 8dh 6 128+ unused storage locations undefined - 5 1. the bank select address is excluded in counting the total # of addresses. 2. this value is based on the component specification. 3. these bytes are programmed by code of date week & date year with bcd format. 4. these bytes are programmed by samsung s own assembly serial # system. all modules may have different unique serial #. 5. these bytes are undefined and can be used for samsung?s own purpose. 6. these values apply to pc100 applications only, per intel pc66/pc100 spd standards. note :
serial presence detect pc133 sodimm rev. 1.2 march. 2000 byte # function described function supported hex value note -75 -75 0 # of bytes written into serial memory at module manufacturer 128bytes 80h 1 total # of bytes of spd memory device 256bytes (2k-bit) 08h 2 fundamental memory type sdram 04h 3 # of row address on this assembly 13 0dh 1 4 # of column address on this assembly 9 09h 1 5 # of module rows on this assembly 2 rows 02h 6 data width of this assembly 64 bits 40h 7 ...... data width of this assembly - 00h 8 voltage interface standard of this assembly lvttl 01h 9 sdram cycle time from clock @cas latency of 3 7.5ns 75h 2 10 sdram access time from clock @cas latency of 3 5.4ns 54h 2 11 dimm configuraion type non parity 00h 12 refresh rate & type 7.8us, support self refresh self 82h 13 primary sdram width x16 10h 14 error checking sdram width none 00h 15 minimum clock dealy for back-to-back random column address t ccd = 1clk 01h 16 sdram device attributes : burst lengths supported 1, 2, 4, 8 & full page 8fh 17 sdram device attributes : # of banks on sdram device 4 banks 04h 18 sdram device attributes : cas latency 3 04h 19 sdram device attributes : cs latency 0 clk 01h 20 sdram device attributes : write latency 0 clk 01h 21 sdram module attributes non-buffered/non-registered & redundant addressing 00h 22 sdram device attributes : general +/- 10% voltage tolerance, burst read single bit write precharge all, auto precharge 0eh 23 sdram cycle time @cas latency of 2 - 00h 2 24 sdram access time @cas latency of 2 - 00h 2 25 sdram cycle time @cas latency of 1 - 00h 2 26 sdram access time @cas latency of 1 - 00h 2 27 minimum row precharge time (=t rp ) 20ns 14h 28 minimum row active to row active delay (t rrd ) 15ns 0fh 29 minimum ras to cas delay (=t rcd ) 20ns 14h 30 minimum activate precharge time (=t ras ) 45ns 2dh 31 module row density 2 rows of 128mb 20h 32 command and address signal input setup time 1.5ns 15h 33 command and address signal input hold time 0.8ns 08h 34 data signal input setup time 1.5ns 15h m464s3254at1-l75/c75(intel spd 1.2b ver. based) ? organization : 32mx64 ? composition : 16mx16 *8 ? used component part # : k4s561632a-tl75/tc75 ? # of rows in module : 2 rows ? # of banks in component : 4 banks ? feature : 1,250 mil height & double sided component ? refresh : 8k/64ms ? contents :
serial presence detect pc133 sodimm rev. 1.2 march. 2000 serial presence detect information byte # function described function supported hex value note -75 -75 35 data signal input hold time 0.8ns 08h 36~61 superset information (maybe used in future) - 00h 62 spd data revision code intel 1.2b 12h 63 checksum for bytes 0 ~ 62 - b8h 64 manufacturer jedec id code samsung ceh 65~71 ...... manufacturer jedec id code samsung 00h 72 manufacturing location onyang korea 01h 73 manufacturer part # (memory module) m 4dh 74 manufacturer part # (dimm configuration) 4 34h 75 manufacturer part # (data bits) blank 20h 76 ...... manufacturer part # (data bits) 6 36h 77 ...... manufacturer part # (data bits) 4 34h 78 manufacturer part # (mode & operating voltage) s 53h 79 manufacturer part # (module depth) 3 33h 80 ...... manufacturer part # (module depth) 2 32h 81 manufacturer part # (refresh, #of banks in comp. & inter- 5 35h 82 manufacturer part # (composition component) 4 34h 83 manufacturer part # (component revision) a 41h 84 manufacturer part # (package type) t 54h 85 manufacturer part # (pcb revision & type) 1 31h 86 manufacturer part # (hyphen) " - " 2dh 87 manufacturer part # (power) l c 4ch 43h 88 manufacturer part # (minimum cycle time) 7 37h 89 manufacturer part # (minimum cycle time) 5 35h 90 manufacturer part # (tbd) blank 20h 91 manufacturer revision code (for pcb) 1 31h 92 ...... manufacturer revision code (for component) a-die (2nd gen.) 41h 93 manufacturing date (week) - - 3 94 manufacturing date (year) - - 3 95~98 assembly serial # - - 4 99~125 manufacturer specific data (may be used in future) undefined - 5 126 reserved - 64h 6 127 reserved detailed pc100 information cdh 6 128+ unused storage locations undefined - 5 1. the bank select address is excluded in counting the total # of addresses. 2. this value is based on the component specification. 3. these bytes are programmed by code of date week & date year with bcd format. 4. these bytes are programmed by samsung s own assembly serial # system. all modules may have different unique serial #. 5. these bytes are undefined and can be used for samsung?s own purpose. 6. these values apply to pc100 applications only, per intel pc66/pc100 spd standards. note :
serial presence detect pc133 sodimm rev. 1.2 march. 2000 byte # function described function supported hex value note -75 -75 0 # of bytes written into serial memory at module manufacturer 128bytes 80h 1 total # of bytes of spd memory device 256bytes (2k-bit) 08h 2 fundamental memory type sdram 04h 3 # of row address on this assembly 13 0dh 1 4 # of column address on this assembly 9 09h 1 5 # of module rows on this assembly 2 rows 02h 6 data width of this assembly 64 bits 40h 7 ...... data width of this assembly - 00h 8 voltage interface standard of this assembly lvttl 01h 9 sdram cycle time from clock @cas latency of 3 7.5ns 75h 2 10 sdram access time from clock @cas latency of 3 5.4ns 54h 2 11 dimm configuraion type non parity 00h 12 refresh rate & type 7.8us, support self refresh self 82h 13 primary sdram width x16 10h 14 error checking sdram width none 00h 15 minimum clock dealy for back-to-back random column address t ccd = 1clk 01h 16 sdram device attributes : burst lengths supported 1, 2, 4, 8 & full page 8fh 17 sdram device attributes : # of banks on sdram device 4 banks 04h 18 sdram device attributes : cas latency 3 04h 19 sdram device attributes : cs latency 0 clk 01h 20 sdram device attributes : write latency 0 clk 01h 21 sdram module attributes non-buffered/non-registered & redundant addressing 00h 22 sdram device attributes : general +/- 10% voltage tolerance, burst read single bit write precharge all, auto precharge 0eh 23 sdram cycle time @cas latency of 2 - 00h 2 24 sdram access time @cas latency of 2 - 00h 2 25 sdram cycle time @cas latency of 1 - 00h 2 26 sdram access time @cas latency of 1 - 00h 2 27 minimum row precharge time (=t rp ) 20ns 14h 28 minimum row active to row active delay (t rrd ) 15ns 0fh 29 minimum ras to cas delay (=t rcd ) 20ns 14h 30 minimum activate precharge time (=t ras ) 45ns 2dh 31 module row density 2 rows of 128mb 20h 32 command and address signal input setup time 1.5ns 15h 33 command and address signal input hold time 0.8ns 08h 34 data signal input setup time 1.5ns 15h m464s3254bt1-l75/c75(intel spd 1.2b ver. based) ? organization : 32mx64 ? composition : 16mx16 *8 ? used component part # : k4s561632b-tl75/tc75 ? # of rows in module : 2 rows ? # of banks in component : 4 banks ? feature : 1,250 mil height & double sided component ? refresh : 8k/64ms ? contents :
serial presence detect pc133 sodimm rev. 1.2 march. 2000 serial presence detect information byte # function described function supported hex value note -75 -75 35 data signal input hold time 0.8ns 08h 36~61 superset information (maybe used in future) - 00h 62 spd data revision code intel 1.2b 12h 63 checksum for bytes 0 ~ 62 - b8h 64 manufacturer jedec id code samsung ceh 65~71 ...... manufacturer jedec id code samsung 00h 72 manufacturing location onyang korea 01h 73 manufacturer part # (memory module) m 4dh 74 manufacturer part # (dimm configuration) 4 34h 75 manufacturer part # (data bits) blank 20h 76 ...... manufacturer part # (data bits) 6 36h 77 ...... manufacturer part # (data bits) 4 34h 78 manufacturer part # (mode & operating voltage) s 53h 79 manufacturer part # (module depth) 3 33h 80 ...... manufacturer part # (module depth) 2 32h 81 manufacturer part # (refresh, #of banks in comp. & inter- 5 35h 82 manufacturer part # (composition component) 4 34h 83 manufacturer part # (component revision) b 42h 84 manufacturer part # (package type) t 54h 85 manufacturer part # (pcb revision & type) 1 31h 86 manufacturer part # (hyphen) " - " 2dh 87 manufacturer part # (power) l c 4ch 43h 88 manufacturer part # (minimum cycle time) 7 37h 89 manufacturer part # (minimum cycle time) 5 35h 90 manufacturer part # (tbd) blank 20h 91 manufacturer revision code (for pcb) 1 31h 92 ...... manufacturer revision code (for component) b-die (3rd gen.) 42h 93 manufacturing date (week) - - 3 94 manufacturing date (year) - - 3 95~98 assembly serial # - - 4 99~125 manufacturer specific data (may be used in future) undefined - 5 126 reserved - 64h 6 127 reserved detailed pc100 information cdh 6 128+ unused storage locations undefined - 5 1. the bank select address is excluded in counting the total # of addresses. 2. this value is based on the component specification. 3. these bytes are programmed by code of date week & date year with bcd format. 4. these bytes are programmed by samsung s own assembly serial # system. all modules may have different unique serial #. 5. these bytes are undefined and can be used for samsung?s own purpose. 6. these values apply to pc100 applications only, per intel pc66/pc100 spd standards. note :

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